Class: RTL::Circuit

Inherits:
Object
  • Object
show all
Defined in:
lib/rtl/circuit.rb

Direct Known Subclasses

BinaryGate, Mux, Reg, UnaryGate

Constant Summary collapse

@@id = 
-1

Instance Attribute Summary collapse

Instance Method Summary collapse

Constructor Details

#initialize(name = nil) ⇒ Circuit

Returns a new instance of Circuit.



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# File 'lib/rtl/circuit.rb', line 14

def initialize name=nil
  @name=name
  @iname="#{name}_#{@@id+=1}"
  @ports={in:[],out:[]}
  @signals=[]
  @components=[]
  @properties={}
  @color="cadetblue"
end

Instance Attribute Details

#color ⇒ Object

Returns the value of attribute color.



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# File 'lib/rtl/circuit.rb', line 11

def color
  @color
end

#components ⇒ Object

Returns the value of attribute components.



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# File 'lib/rtl/circuit.rb', line 7

def components
  @components
end

#father ⇒ Object

Returns the value of attribute father.



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# File 'lib/rtl/circuit.rb', line 8

def father
  @father
end

#iname ⇒ Object

Returns the value of attribute iname.



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# File 'lib/rtl/circuit.rb', line 5

def iname
  @iname
end

#name ⇒ Object

Returns the value of attribute name.



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# File 'lib/rtl/circuit.rb', line 4

def name
  @name
end

#ports ⇒ Object

Returns the value of attribute ports.



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# File 'lib/rtl/circuit.rb', line 6

def ports
  @ports
end

#properties ⇒ Object

Returns the value of attribute properties.



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# File 'lib/rtl/circuit.rb', line 10

def properties
  @properties
end

#signals ⇒ Object

Returns the value of attribute signals.



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# File 'lib/rtl/circuit.rb', line 9

def signals
  @signals
end

Instance Method Details

#add(element) ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 24

def add element
  port=circuit=sig=element
  case element
  when Sig
    @signals<< sig
    sig.circuit=self
  when Port
    @ports[port.dir] << port
    port.circuit=self
  when Circuit
    @components << circuit
    circuit.father=self
  else
    raise "ERROR : when adding '#{element}'"
  end
end

#component_named(name) ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 50

def component_named name
  @components.find{|comp| comp.iname==name}
end

#inputs ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 54

def inputs
  @ports[:in]
end

#make_lib ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 79

def make_lib
  filename="#{name}.lib"
  File.open(filename,'w') do |f|
    f.puts Marshal.dump(self)
  end
end

#new_instance ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 70

def new_instance
  @@clone_id||={}
  @@clone_id[name]||=-1
  @@clone_id[name]+=1
  clone=Marshal.load(Marshal.dump(self))
  clone.iname=self.name+"_#{@@clone_id[name]}"
  clone
end

#outputs ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 58

def outputs
  @ports[:out]
end

#port(name) ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 45

def port name
  all=@ports[:in]+@ports[:out]
  all.flatten.find{|p| p.name==name}
end

#port_named(dir, name) ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 41

def port_named dir,name
  @ports[dir].find{|p| p.name==name}
end

#to_dot ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 86

def to_dot
  Printer.new.print self
end

#wires ⇒ Object 



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# File 'lib/rtl/circuit.rb', line 62

def wires
  wires=[]
  wires << inputs.map{|p| p.fanout}
  wires << signals.map{|p| p.fanout}
  wires << components.map{|comp| comp.outputs.map{|o| o.fanout}}
  wires.flatten
end