Class: OrigenTesters::Test::NVMSub

Inherits:
NVM
  • Object
show all
Defined in:
lib/origen_testers/test/nvm.rb

Instance Attribute Summary

Attributes inherited from NVM

#blocks

Instance Method Summary collapse

Methods inherited from NVM

#add_proth_reg, #added_method, #find_block_by_id, #initialize, #override_method, #reg_owner_alias

Constructor Details

This class inherits a constructor from OrigenTesters::Test::NVM

Instance Method Details

#add_reg_with_block_format ⇒ Object

Tests that the block format for defining registers works



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# File 'lib/origen_testers/test/nvm.rb', line 55

def add_reg_with_block_format
  # ** Data Register 3 **
  # This is dreg
  add_reg :dreg, 0x1000, size: 16 do
    # This is dreg bit 15
    bit 15,    :bit15, reset: 1
    # **Bit 14** - This does something cool
    #
    # 0 | Coolness is disabled
    # 1 | Coolness is enabled
    bits 14,    :bit14
    # This is dreg bit upper
    bits 13..8, :upper
    # This is dreg bit lower
    # This is dreg bit lower line 2
    bit 7..0,  :lower, writable: false, reset: 0x55
  end

  # This is dreg2
  reg :dreg2, 0x1000, size: 16 do
    # This is dreg2 bit 15
    bit 15,    :bit15, reset: 1
    # This is dreg2 bit upper
    bits 14..8, :upper
    # This is dreg2 bit lower
    # This is dreg2 bit lower line 2
    bit 7..0,  :lower, writable: false, reset: 0x55
  end

  # Finally a test that descriptions can be supplied via the API
  reg :dreg3, 0x1000, size: 16, description: "** Data Register 3 **\nThis is dreg3" do
    bit 15,    :bit15, reset: 1, description: 'This is dreg3 bit 15'
    bit 14, :bit14, description: "**Bit 14** - This does something cool\n\n0 | Coolness is disabled\n1 | Coolness is enabled"
    bits 13..8, :upper, description: 'This is dreg3 bit upper'
    bit 7..0,  :lower, writable: false, reset: 0x55, description: "This is dreg3 bit lower\nThis is dreg3 bit lower line 2"
  end
end

#redefine_data_reg ⇒ Object 



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# File 'lib/origen_testers/test/nvm.rb', line 50

def redefine_data_reg
  add_reg :data,      0x40,   16,  d: { pos: 0, bits: 16 }
end