Module: Crabstone::ARM64

Defined in:
lib/arch/arm64.rb,
lib/arch/arm64_const.rb,
lib/arch/arm64_registers.rb

Defined Under Namespace

Classes: Instruction, MemoryOperand, Operand, OperandShift, OperandValue

Constant Summary collapse

SFT_INVALID =

ARM64 shift type

0
SFT_LSL = 
1
SFT_MSL = 
2
SFT_LSR = 
3
SFT_ASR = 
4
SFT_ROR = 
5
EXT_INVALID =

ARM64 extender type

0
EXT_UXTB = 
1
EXT_UXTH = 
2
EXT_UXTW = 
3
EXT_UXTX = 
4
EXT_SXTB = 
5
EXT_SXTH = 
6
EXT_SXTW = 
7
EXT_SXTX = 
8
CC_INVALID =

ARM64 condition code

0
CC_EQ = 
1
CC_NE = 
2
CC_HS = 
3
CC_LO = 
4
CC_MI = 
5
CC_PL = 
6
CC_VS = 
7
CC_VC = 
8
CC_HI = 
9
CC_LS = 
10
CC_GE = 
11
CC_LT = 
12
CC_GT = 
13
CC_LE = 
14
CC_AL = 
15
CC_NV = 
16
SYSREG_INVALID =

System registers for MRS

0
SYSREG_MDCCSR_EL0 = 
0x9808
SYSREG_DBGDTRRX_EL0 = 
0x9828
SYSREG_MDRAR_EL1 = 
0x8080
SYSREG_OSLSR_EL1 = 
0x808c
SYSREG_DBGAUTHSTATUS_EL1 = 
0x83f6
SYSREG_PMCEID0_EL0 = 
0xdce6
SYSREG_PMCEID1_EL0 = 
0xdce7
SYSREG_MIDR_EL1 = 
0xc000
SYSREG_CCSIDR_EL1 = 
0xc800
SYSREG_CLIDR_EL1 = 
0xc801
SYSREG_CTR_EL0 = 
0xd801
SYSREG_MPIDR_EL1 = 
0xc005
SYSREG_REVIDR_EL1 = 
0xc006
SYSREG_AIDR_EL1 = 
0xc807
SYSREG_DCZID_EL0 = 
0xd807
SYSREG_ID_PFR0_EL1 = 
0xc008
SYSREG_ID_PFR1_EL1 = 
0xc009
SYSREG_ID_DFR0_EL1 = 
0xc00a
SYSREG_ID_AFR0_EL1 = 
0xc00b
SYSREG_ID_MMFR0_EL1 = 
0xc00c
SYSREG_ID_MMFR1_EL1 = 
0xc00d
SYSREG_ID_MMFR2_EL1 = 
0xc00e
SYSREG_ID_MMFR3_EL1 = 
0xc00f
SYSREG_ID_ISAR0_EL1 = 
0xc010
SYSREG_ID_ISAR1_EL1 = 
0xc011
SYSREG_ID_ISAR2_EL1 = 
0xc012
SYSREG_ID_ISAR3_EL1 = 
0xc013
SYSREG_ID_ISAR4_EL1 = 
0xc014
SYSREG_ID_ISAR5_EL1 = 
0xc015
SYSREG_ID_A64PFR0_EL1 = 
0xc020
SYSREG_ID_A64PFR1_EL1 = 
0xc021
SYSREG_ID_A64DFR0_EL1 = 
0xc028
SYSREG_ID_A64DFR1_EL1 = 
0xc029
SYSREG_ID_A64AFR0_EL1 = 
0xc02c
SYSREG_ID_A64AFR1_EL1 = 
0xc02d
SYSREG_ID_A64ISAR0_EL1 = 
0xc030
SYSREG_ID_A64ISAR1_EL1 = 
0xc031
SYSREG_ID_A64MMFR0_EL1 = 
0xc038
SYSREG_ID_A64MMFR1_EL1 = 
0xc039
SYSREG_MVFR0_EL1 = 
0xc018
SYSREG_MVFR1_EL1 = 
0xc019
SYSREG_MVFR2_EL1 = 
0xc01a
SYSREG_RVBAR_EL1 = 
0xc601
SYSREG_RVBAR_EL2 = 
0xe601
SYSREG_RVBAR_EL3 = 
0xf601
SYSREG_ISR_EL1 = 
0xc608
SYSREG_CNTPCT_EL0 = 
0xdf01
SYSREG_CNTVCT_EL0 = 
0xdf02
SYSREG_TRCSTATR = 
0x8818
SYSREG_TRCIDR8 = 
0x8806
SYSREG_TRCIDR9 = 
0x880e
SYSREG_TRCIDR10 = 
0x8816
SYSREG_TRCIDR11 = 
0x881e
SYSREG_TRCIDR12 = 
0x8826
SYSREG_TRCIDR13 = 
0x882e
SYSREG_TRCIDR0 = 
0x8847
SYSREG_TRCIDR1 = 
0x884f
SYSREG_TRCIDR2 = 
0x8857
SYSREG_TRCIDR3 = 
0x885f
SYSREG_TRCIDR4 = 
0x8867
SYSREG_TRCIDR5 = 
0x886f
SYSREG_TRCIDR6 = 
0x8877
SYSREG_TRCIDR7 = 
0x887f
SYSREG_TRCOSLSR = 
0x888c
SYSREG_TRCPDSR = 
0x88ac
SYSREG_TRCDEVAFF0 = 
0x8bd6
SYSREG_TRCDEVAFF1 = 
0x8bde
SYSREG_TRCLSR = 
0x8bee
SYSREG_TRCAUTHSTATUS = 
0x8bf6
SYSREG_TRCDEVARCH = 
0x8bfe
SYSREG_TRCDEVID = 
0x8b97
SYSREG_TRCDEVTYPE = 
0x8b9f
SYSREG_TRCPIDR4 = 
0x8ba7
SYSREG_TRCPIDR5 = 
0x8baf
SYSREG_TRCPIDR6 = 
0x8bb7
SYSREG_TRCPIDR7 = 
0x8bbf
SYSREG_TRCPIDR0 = 
0x8bc7
SYSREG_TRCPIDR1 = 
0x8bcf
SYSREG_TRCPIDR2 = 
0x8bd7
SYSREG_TRCPIDR3 = 
0x8bdf
SYSREG_TRCCIDR0 = 
0x8be7
SYSREG_TRCCIDR1 = 
0x8bef
SYSREG_TRCCIDR2 = 
0x8bf7
SYSREG_TRCCIDR3 = 
0x8bff
SYSREG_ICC_IAR1_EL1 = 
0xc660
SYSREG_ICC_IAR0_EL1 = 
0xc640
SYSREG_ICC_HPPIR1_EL1 = 
0xc662
SYSREG_ICC_HPPIR0_EL1 = 
0xc642
SYSREG_ICC_RPR_EL1 = 
0xc65b
SYSREG_ICH_VTR_EL2 = 
0xe659
SYSREG_ICH_EISR_EL2 = 
0xe65b
SYSREG_ICH_ELSR_EL2 = 
0xe65d
SYSREG_DBGDTRTX_EL0 =

System registers for MSR

0x9828
SYSREG_OSLAR_EL1 = 
0x8084
SYSREG_PMSWINC_EL0 = 
0xdce4
SYSREG_TRCOSLAR = 
0x8884
SYSREG_TRCLAR = 
0x8be6
SYSREG_ICC_EOIR1_EL1 = 
0xc661
SYSREG_ICC_EOIR0_EL1 = 
0xc641
SYSREG_ICC_DIR_EL1 = 
0xc659
SYSREG_ICC_SGI1R_EL1 = 
0xc65d
SYSREG_ICC_ASGI1R_EL1 = 
0xc65e
SYSREG_ICC_SGI0R_EL1 = 
0xc65f
PSTATE_INVALID =

System PState Field (MSR instruction)

0
PSTATE_SPSEL = 
0x05
PSTATE_DAIFSET = 
0x1e
PSTATE_DAIFCLR = 
0x1f
VAS_INVALID =

Vector arrangement specifier (for FloatingPoint/Advanced SIMD insn)

0
VAS_8B = 
1
VAS_16B = 
2
VAS_4H = 
3
VAS_8H = 
4
VAS_2S = 
5
VAS_4S = 
6
VAS_1D = 
7
VAS_2D = 
8
VAS_1Q = 
9
VESS_INVALID =

Vector element size specifier

0
VESS_B = 
1
VESS_H = 
2
VESS_S = 
3
VESS_D = 
4
BARRIER_INVALID =

Memory barrier operands

0
BARRIER_OSHLD = 
0x1
BARRIER_OSHST = 
0x2
BARRIER_OSH = 
0x3
BARRIER_NSHLD = 
0x5
BARRIER_NSHST = 
0x6
BARRIER_NSH = 
0x7
BARRIER_ISHLD = 
0x9
BARRIER_ISHST = 
0xa
BARRIER_ISH = 
0xb
BARRIER_LD = 
0xd
BARRIER_ST = 
0xe
BARRIER_SY = 
0xf
OP_INVALID =

Operand type for instruction’s operands

0
OP_REG = 
1
OP_IMM = 
2
OP_MEM = 
3
OP_FP = 
4
OP_CIMM = 
64
OP_REG_MRS = 
65
OP_REG_MSR = 
66
OP_PSTATE = 
67
OP_SYS = 
68
OP_PREFETCH = 
69
OP_BARRIER = 
70
TLBI_INVALID =

TLBI operations

0
TLBI_VMALLE1IS = 
1
TLBI_VAE1IS = 
2
TLBI_ASIDE1IS = 
3
TLBI_VAAE1IS = 
4
TLBI_VALE1IS = 
5
TLBI_VAALE1IS = 
6
TLBI_ALLE2IS = 
7
TLBI_VAE2IS = 
8
TLBI_ALLE1IS = 
9
TLBI_VALE2IS = 
10
TLBI_VMALLS12E1IS = 
11
TLBI_ALLE3IS = 
12
TLBI_VAE3IS = 
13
TLBI_VALE3IS = 
14
TLBI_IPAS2E1IS = 
15
TLBI_IPAS2LE1IS = 
16
TLBI_IPAS2E1 = 
17
TLBI_IPAS2LE1 = 
18
TLBI_VMALLE1 = 
19
TLBI_VAE1 = 
20
TLBI_ASIDE1 = 
21
TLBI_VAAE1 = 
22
TLBI_VALE1 = 
23
TLBI_VAALE1 = 
24
TLBI_ALLE2 = 
25
TLBI_VAE2 = 
26
TLBI_ALLE1 = 
27
TLBI_VALE2 = 
28
TLBI_VMALLS12E1 = 
29
TLBI_ALLE3 = 
30
TLBI_VAE3 = 
31
TLBI_VALE3 = 
32
AT_S1E1R =

AT operations

33
AT_S1E1W = 
34
AT_S1E0R = 
35
AT_S1E0W = 
36
AT_S1E2R = 
37
AT_S1E2W = 
38
AT_S12E1R = 
39
AT_S12E1W = 
40
AT_S12E0R = 
41
AT_S12E0W = 
42
AT_S1E3R = 
43
AT_S1E3W = 
44
DC_INVALID =

DC operations

0
DC_ZVA = 
1
DC_IVAC = 
2
DC_ISW = 
3
DC_CVAC = 
4
DC_CSW = 
5
DC_CVAU = 
6
DC_CIVAC = 
7
DC_CISW = 
8
IC_INVALID =

IC operations

0
IC_IALLUIS = 
1
IC_IALLU = 
2
IC_IVAU = 
3
PRFM_INVALID =

Prefetch operations (PRFM)

0
PRFM_PLDL1KEEP = 
0x00+1
PRFM_PLDL1STRM = 
0x01+1
PRFM_PLDL2KEEP = 
0x02+1
PRFM_PLDL2STRM = 
0x03+1
PRFM_PLDL3KEEP = 
0x04+1
PRFM_PLDL3STRM = 
0x05+1
PRFM_PLIL1KEEP = 
0x08+1
PRFM_PLIL1STRM = 
0x09+1
PRFM_PLIL2KEEP = 
0x0a+1
PRFM_PLIL2STRM = 
0x0b+1
PRFM_PLIL3KEEP = 
0x0c+1
PRFM_PLIL3STRM = 
0x0d+1
PRFM_PSTL1KEEP = 
0x10+1
PRFM_PSTL1STRM = 
0x11+1
PRFM_PSTL2KEEP = 
0x12+1
PRFM_PSTL2STRM = 
0x13+1
PRFM_PSTL3KEEP = 
0x14+1
PRFM_PSTL3STRM = 
0x15+1
REG_INVALID =

ARM64 registers

0
REG_X29 = 
1
REG_X30 = 
2
REG_NZCV = 
3
REG_SP = 
4
REG_WSP = 
5
REG_WZR = 
6
REG_XZR = 
7
REG_B0 = 
8
REG_B1 = 
9
REG_B2 = 
10
REG_B3 = 
11
REG_B4 = 
12
REG_B5 = 
13
REG_B6 = 
14
REG_B7 = 
15
REG_B8 = 
16
REG_B9 = 
17
REG_B10 = 
18
REG_B11 = 
19
REG_B12 = 
20
REG_B13 = 
21
REG_B14 = 
22
REG_B15 = 
23
REG_B16 = 
24
REG_B17 = 
25
REG_B18 = 
26
REG_B19 = 
27
REG_B20 = 
28
REG_B21 = 
29
REG_B22 = 
30
REG_B23 = 
31
REG_B24 = 
32
REG_B25 = 
33
REG_B26 = 
34
REG_B27 = 
35
REG_B28 = 
36
REG_B29 = 
37
REG_B30 = 
38
REG_B31 = 
39
REG_D0 = 
40
REG_D1 = 
41
REG_D2 = 
42
REG_D3 = 
43
REG_D4 = 
44
REG_D5 = 
45
REG_D6 = 
46
REG_D7 = 
47
REG_D8 = 
48
REG_D9 = 
49
REG_D10 = 
50
REG_D11 = 
51
REG_D12 = 
52
REG_D13 = 
53
REG_D14 = 
54
REG_D15 = 
55
REG_D16 = 
56
REG_D17 = 
57
REG_D18 = 
58
REG_D19 = 
59
REG_D20 = 
60
REG_D21 = 
61
REG_D22 = 
62
REG_D23 = 
63
REG_D24 = 
64
REG_D25 = 
65
REG_D26 = 
66
REG_D27 = 
67
REG_D28 = 
68
REG_D29 = 
69
REG_D30 = 
70
REG_D31 = 
71
REG_H0 = 
72
REG_H1 = 
73
REG_H2 = 
74
REG_H3 = 
75
REG_H4 = 
76
REG_H5 = 
77
REG_H6 = 
78
REG_H7 = 
79
REG_H8 = 
80
REG_H9 = 
81
REG_H10 = 
82
REG_H11 = 
83
REG_H12 = 
84
REG_H13 = 
85
REG_H14 = 
86
REG_H15 = 
87
REG_H16 = 
88
REG_H17 = 
89
REG_H18 = 
90
REG_H19 = 
91
REG_H20 = 
92
REG_H21 = 
93
REG_H22 = 
94
REG_H23 = 
95
REG_H24 = 
96
REG_H25 = 
97
REG_H26 = 
98
REG_H27 = 
99
REG_H28 = 
100
REG_H29 = 
101
REG_H30 = 
102
REG_H31 = 
103
REG_Q0 = 
104
REG_Q1 = 
105
REG_Q2 = 
106
REG_Q3 = 
107
REG_Q4 = 
108
REG_Q5 = 
109
REG_Q6 = 
110
REG_Q7 = 
111
REG_Q8 = 
112
REG_Q9 = 
113
REG_Q10 = 
114
REG_Q11 = 
115
REG_Q12 = 
116
REG_Q13 = 
117
REG_Q14 = 
118
REG_Q15 = 
119
REG_Q16 = 
120
REG_Q17 = 
121
REG_Q18 = 
122
REG_Q19 = 
123
REG_Q20 = 
124
REG_Q21 = 
125
REG_Q22 = 
126
REG_Q23 = 
127
REG_Q24 = 
128
REG_Q25 = 
129
REG_Q26 = 
130
REG_Q27 = 
131
REG_Q28 = 
132
REG_Q29 = 
133
REG_Q30 = 
134
REG_Q31 = 
135
REG_S0 = 
136
REG_S1 = 
137
REG_S2 = 
138
REG_S3 = 
139
REG_S4 = 
140
REG_S5 = 
141
REG_S6 = 
142
REG_S7 = 
143
REG_S8 = 
144
REG_S9 = 
145
REG_S10 = 
146
REG_S11 = 
147
REG_S12 = 
148
REG_S13 = 
149
REG_S14 = 
150
REG_S15 = 
151
REG_S16 = 
152
REG_S17 = 
153
REG_S18 = 
154
REG_S19 = 
155
REG_S20 = 
156
REG_S21 = 
157
REG_S22 = 
158
REG_S23 = 
159
REG_S24 = 
160
REG_S25 = 
161
REG_S26 = 
162
REG_S27 = 
163
REG_S28 = 
164
REG_S29 = 
165
REG_S30 = 
166
REG_S31 = 
167
REG_W0 = 
168
REG_W1 = 
169
REG_W2 = 
170
REG_W3 = 
171
REG_W4 = 
172
REG_W5 = 
173
REG_W6 = 
174
REG_W7 = 
175
REG_W8 = 
176
REG_W9 = 
177
REG_W10 = 
178
REG_W11 = 
179
REG_W12 = 
180
REG_W13 = 
181
REG_W14 = 
182
REG_W15 = 
183
REG_W16 = 
184
REG_W17 = 
185
REG_W18 = 
186
REG_W19 = 
187
REG_W20 = 
188
REG_W21 = 
189
REG_W22 = 
190
REG_W23 = 
191
REG_W24 = 
192
REG_W25 = 
193
REG_W26 = 
194
REG_W27 = 
195
REG_W28 = 
196
REG_W29 = 
197
REG_W30 = 
198
REG_X0 = 
199
REG_X1 = 
200
REG_X2 = 
201
REG_X3 = 
202
REG_X4 = 
203
REG_X5 = 
204
REG_X6 = 
205
REG_X7 = 
206
REG_X8 = 
207
REG_X9 = 
208
REG_X10 = 
209
REG_X11 = 
210
REG_X12 = 
211
REG_X13 = 
212
REG_X14 = 
213
REG_X15 = 
214
REG_X16 = 
215
REG_X17 = 
216
REG_X18 = 
217
REG_X19 = 
218
REG_X20 = 
219
REG_X21 = 
220
REG_X22 = 
221
REG_X23 = 
222
REG_X24 = 
223
REG_X25 = 
224
REG_X26 = 
225
REG_X27 = 
226
REG_X28 = 
227
REG_V0 = 
228
REG_V1 = 
229
REG_V2 = 
230
REG_V3 = 
231
REG_V4 = 
232
REG_V5 = 
233
REG_V6 = 
234
REG_V7 = 
235
REG_V8 = 
236
REG_V9 = 
237
REG_V10 = 
238
REG_V11 = 
239
REG_V12 = 
240
REG_V13 = 
241
REG_V14 = 
242
REG_V15 = 
243
REG_V16 = 
244
REG_V17 = 
245
REG_V18 = 
246
REG_V19 = 
247
REG_V20 = 
248
REG_V21 = 
249
REG_V22 = 
250
REG_V23 = 
251
REG_V24 = 
252
REG_V25 = 
253
REG_V26 = 
254
REG_V27 = 
255
REG_V28 = 
256
REG_V29 = 
257
REG_V30 = 
258
REG_V31 = 
259
REG_ENDING = 
260
REG_IP1 =

alias registers

REG_X16
REG_IP0 = 
REG_X17
REG_FP = 
REG_X29
REG_LR = 
REG_X30
INS_INVALID =

ARM64 instruction

0
INS_ABS = 
1
INS_ADC = 
2
INS_ADDHN = 
3
INS_ADDHN2 = 
4
INS_ADDP = 
5
INS_ADD = 
6
INS_ADDV = 
7
INS_ADR = 
8
INS_ADRP = 
9
INS_AESD = 
10
INS_AESE = 
11
INS_AESIMC = 
12
INS_AESMC = 
13
INS_AND = 
14
INS_ASR = 
15
INS_B = 
16
INS_BFM = 
17
INS_BIC = 
18
INS_BIF = 
19
INS_BIT = 
20
INS_BL = 
21
INS_BLR = 
22
INS_BR = 
23
INS_BRK = 
24
INS_BSL = 
25
INS_CBNZ = 
26
INS_CBZ = 
27
INS_CCMN = 
28
INS_CCMP = 
29
INS_CLREX = 
30
INS_CLS = 
31
INS_CLZ = 
32
INS_CMEQ = 
33
INS_CMGE = 
34
INS_CMGT = 
35
INS_CMHI = 
36
INS_CMHS = 
37
INS_CMLE = 
38
INS_CMLT = 
39
INS_CMTST = 
40
INS_CNT = 
41
INS_MOV = 
42
INS_CRC32B = 
43
INS_CRC32CB = 
44
INS_CRC32CH = 
45
INS_CRC32CW = 
46
INS_CRC32CX = 
47
INS_CRC32H = 
48
INS_CRC32W = 
49
INS_CRC32X = 
50
INS_CSEL = 
51
INS_CSINC = 
52
INS_CSINV = 
53
INS_CSNEG = 
54
INS_DCPS1 = 
55
INS_DCPS2 = 
56
INS_DCPS3 = 
57
INS_DMB = 
58
INS_DRPS = 
59
INS_DSB = 
60
INS_DUP = 
61
INS_EON = 
62
INS_EOR = 
63
INS_ERET = 
64
INS_EXTR = 
65
INS_EXT = 
66
INS_FABD = 
67
INS_FABS = 
68
INS_FACGE = 
69
INS_FACGT = 
70
INS_FADD = 
71
INS_FADDP = 
72
INS_FCCMP = 
73
INS_FCCMPE = 
74
INS_FCMEQ = 
75
INS_FCMGE = 
76
INS_FCMGT = 
77
INS_FCMLE = 
78
INS_FCMLT = 
79
INS_FCMP = 
80
INS_FCMPE = 
81
INS_FCSEL = 
82
INS_FCVTAS = 
83
INS_FCVTAU = 
84
INS_FCVT = 
85
INS_FCVTL = 
86
INS_FCVTL2 = 
87
INS_FCVTMS = 
88
INS_FCVTMU = 
89
INS_FCVTNS = 
90
INS_FCVTNU = 
91
INS_FCVTN = 
92
INS_FCVTN2 = 
93
INS_FCVTPS = 
94
INS_FCVTPU = 
95
INS_FCVTXN = 
96
INS_FCVTXN2 = 
97
INS_FCVTZS = 
98
INS_FCVTZU = 
99
INS_FDIV = 
100
INS_FMADD = 
101
INS_FMAX = 
102
INS_FMAXNM = 
103
INS_FMAXNMP = 
104
INS_FMAXNMV = 
105
INS_FMAXP = 
106
INS_FMAXV = 
107
INS_FMIN = 
108
INS_FMINNM = 
109
INS_FMINNMP = 
110
INS_FMINNMV = 
111
INS_FMINP = 
112
INS_FMINV = 
113
INS_FMLA = 
114
INS_FMLS = 
115
INS_FMOV = 
116
INS_FMSUB = 
117
INS_FMUL = 
118
INS_FMULX = 
119
INS_FNEG = 
120
INS_FNMADD = 
121
INS_FNMSUB = 
122
INS_FNMUL = 
123
INS_FRECPE = 
124
INS_FRECPS = 
125
INS_FRECPX = 
126
INS_FRINTA = 
127
INS_FRINTI = 
128
INS_FRINTM = 
129
INS_FRINTN = 
130
INS_FRINTP = 
131
INS_FRINTX = 
132
INS_FRINTZ = 
133
INS_FRSQRTE = 
134
INS_FRSQRTS = 
135
INS_FSQRT = 
136
INS_FSUB = 
137
INS_HINT = 
138
INS_HLT = 
139
INS_HVC = 
140
INS_INS = 
141
INS_ISB = 
142
INS_LD1 = 
143
INS_LD1R = 
144
INS_LD2R = 
145
INS_LD2 = 
146
INS_LD3R = 
147
INS_LD3 = 
148
INS_LD4 = 
149
INS_LD4R = 
150
INS_LDARB = 
151
INS_LDARH = 
152
INS_LDAR = 
153
INS_LDAXP = 
154
INS_LDAXRB = 
155
INS_LDAXRH = 
156
INS_LDAXR = 
157
INS_LDNP = 
158
INS_LDP = 
159
INS_LDPSW = 
160
INS_LDRB = 
161
INS_LDR = 
162
INS_LDRH = 
163
INS_LDRSB = 
164
INS_LDRSH = 
165
INS_LDRSW = 
166
INS_LDTRB = 
167
INS_LDTRH = 
168
INS_LDTRSB = 
169
INS_LDTRSH = 
170
INS_LDTRSW = 
171
INS_LDTR = 
172
INS_LDURB = 
173
INS_LDUR = 
174
INS_LDURH = 
175
INS_LDURSB = 
176
INS_LDURSH = 
177
INS_LDURSW = 
178
INS_LDXP = 
179
INS_LDXRB = 
180
INS_LDXRH = 
181
INS_LDXR = 
182
INS_LSL = 
183
INS_LSR = 
184
INS_MADD = 
185
INS_MLA = 
186
INS_MLS = 
187
INS_MOVI = 
188
INS_MOVK = 
189
INS_MOVN = 
190
INS_MOVZ = 
191
INS_MRS = 
192
INS_MSR = 
193
INS_MSUB = 
194
INS_MUL = 
195
INS_MVNI = 
196
INS_NEG = 
197
INS_NOT = 
198
INS_ORN = 
199
INS_ORR = 
200
INS_PMULL2 = 
201
INS_PMULL = 
202
INS_PMUL = 
203
INS_PRFM = 
204
INS_PRFUM = 
205
INS_RADDHN = 
206
INS_RADDHN2 = 
207
INS_RBIT = 
208
INS_RET = 
209
INS_REV16 = 
210
INS_REV32 = 
211
INS_REV64 = 
212
INS_REV = 
213
INS_ROR = 
214
INS_RSHRN2 = 
215
INS_RSHRN = 
216
INS_RSUBHN = 
217
INS_RSUBHN2 = 
218
INS_SABAL2 = 
219
INS_SABAL = 
220
INS_SABA = 
221
INS_SABDL2 = 
222
INS_SABDL = 
223
INS_SABD = 
224
INS_SADALP = 
225
INS_SADDLP = 
226
INS_SADDLV = 
227
INS_SADDL2 = 
228
INS_SADDL = 
229
INS_SADDW2 = 
230
INS_SADDW = 
231
INS_SBC = 
232
INS_SBFM = 
233
INS_SCVTF = 
234
INS_SDIV = 
235
INS_SHA1C = 
236
INS_SHA1H = 
237
INS_SHA1M = 
238
INS_SHA1P = 
239
INS_SHA1SU0 = 
240
INS_SHA1SU1 = 
241
INS_SHA256H2 = 
242
INS_SHA256H = 
243
INS_SHA256SU0 = 
244
INS_SHA256SU1 = 
245
INS_SHADD = 
246
INS_SHLL2 = 
247
INS_SHLL = 
248
INS_SHL = 
249
INS_SHRN2 = 
250
INS_SHRN = 
251
INS_SHSUB = 
252
INS_SLI = 
253
INS_SMADDL = 
254
INS_SMAXP = 
255
INS_SMAXV = 
256
INS_SMAX = 
257
INS_SMC = 
258
INS_SMINP = 
259
INS_SMINV = 
260
INS_SMIN = 
261
INS_SMLAL2 = 
262
INS_SMLAL = 
263
INS_SMLSL2 = 
264
INS_SMLSL = 
265
INS_SMOV = 
266
INS_SMSUBL = 
267
INS_SMULH = 
268
INS_SMULL2 = 
269
INS_SMULL = 
270
INS_SQABS = 
271
INS_SQADD = 
272
INS_SQDMLAL = 
273
INS_SQDMLAL2 = 
274
INS_SQDMLSL = 
275
INS_SQDMLSL2 = 
276
INS_SQDMULH = 
277
INS_SQDMULL = 
278
INS_SQDMULL2 = 
279
INS_SQNEG = 
280
INS_SQRDMULH = 
281
INS_SQRSHL = 
282
INS_SQRSHRN = 
283
INS_SQRSHRN2 = 
284
INS_SQRSHRUN = 
285
INS_SQRSHRUN2 = 
286
INS_SQSHLU = 
287
INS_SQSHL = 
288
INS_SQSHRN = 
289
INS_SQSHRN2 = 
290
INS_SQSHRUN = 
291
INS_SQSHRUN2 = 
292
INS_SQSUB = 
293
INS_SQXTN2 = 
294
INS_SQXTN = 
295
INS_SQXTUN2 = 
296
INS_SQXTUN = 
297
INS_SRHADD = 
298
INS_SRI = 
299
INS_SRSHL = 
300
INS_SRSHR = 
301
INS_SRSRA = 
302
INS_SSHLL2 = 
303
INS_SSHLL = 
304
INS_SSHL = 
305
INS_SSHR = 
306
INS_SSRA = 
307
INS_SSUBL2 = 
308
INS_SSUBL = 
309
INS_SSUBW2 = 
310
INS_SSUBW = 
311
INS_ST1 = 
312
INS_ST2 = 
313
INS_ST3 = 
314
INS_ST4 = 
315
INS_STLRB = 
316
INS_STLRH = 
317
INS_STLR = 
318
INS_STLXP = 
319
INS_STLXRB = 
320
INS_STLXRH = 
321
INS_STLXR = 
322
INS_STNP = 
323
INS_STP = 
324
INS_STRB = 
325
INS_STR = 
326
INS_STRH = 
327
INS_STTRB = 
328
INS_STTRH = 
329
INS_STTR = 
330
INS_STURB = 
331
INS_STUR = 
332
INS_STURH = 
333
INS_STXP = 
334
INS_STXRB = 
335
INS_STXRH = 
336
INS_STXR = 
337
INS_SUBHN = 
338
INS_SUBHN2 = 
339
INS_SUB = 
340
INS_SUQADD = 
341
INS_SVC = 
342
INS_SYSL = 
343
INS_SYS = 
344
INS_TBL = 
345
INS_TBNZ = 
346
INS_TBX = 
347
INS_TBZ = 
348
INS_TRN1 = 
349
INS_TRN2 = 
350
INS_UABAL2 = 
351
INS_UABAL = 
352
INS_UABA = 
353
INS_UABDL2 = 
354
INS_UABDL = 
355
INS_UABD = 
356
INS_UADALP = 
357
INS_UADDLP = 
358
INS_UADDLV = 
359
INS_UADDL2 = 
360
INS_UADDL = 
361
INS_UADDW2 = 
362
INS_UADDW = 
363
INS_UBFM = 
364
INS_UCVTF = 
365
INS_UDIV = 
366
INS_UHADD = 
367
INS_UHSUB = 
368
INS_UMADDL = 
369
INS_UMAXP = 
370
INS_UMAXV = 
371
INS_UMAX = 
372
INS_UMINP = 
373
INS_UMINV = 
374
INS_UMIN = 
375
INS_UMLAL2 = 
376
INS_UMLAL = 
377
INS_UMLSL2 = 
378
INS_UMLSL = 
379
INS_UMOV = 
380
INS_UMSUBL = 
381
INS_UMULH = 
382
INS_UMULL2 = 
383
INS_UMULL = 
384
INS_UQADD = 
385
INS_UQRSHL = 
386
INS_UQRSHRN = 
387
INS_UQRSHRN2 = 
388
INS_UQSHL = 
389
INS_UQSHRN = 
390
INS_UQSHRN2 = 
391
INS_UQSUB = 
392
INS_UQXTN2 = 
393
INS_UQXTN = 
394
INS_URECPE = 
395
INS_URHADD = 
396
INS_URSHL = 
397
INS_URSHR = 
398
INS_URSQRTE = 
399
INS_URSRA = 
400
INS_USHLL2 = 
401
INS_USHLL = 
402
INS_USHL = 
403
INS_USHR = 
404
INS_USQADD = 
405
INS_USRA = 
406
INS_USUBL2 = 
407
INS_USUBL = 
408
INS_USUBW2 = 
409
INS_USUBW = 
410
INS_UZP1 = 
411
INS_UZP2 = 
412
INS_XTN2 = 
413
INS_XTN = 
414
INS_ZIP1 = 
415
INS_ZIP2 = 
416
INS_MNEG = 
417
INS_UMNEGL = 
418
INS_SMNEGL = 
419
INS_NOP = 
420
INS_YIELD = 
421
INS_WFE = 
422
INS_WFI = 
423
INS_SEV = 
424
INS_SEVL = 
425
INS_NGC = 
426
INS_SBFIZ = 
427
INS_UBFIZ = 
428
INS_SBFX = 
429
INS_UBFX = 
430
INS_BFI = 
431
INS_BFXIL = 
432
INS_CMN = 
433
INS_MVN = 
434
INS_TST = 
435
INS_CSET = 
436
INS_CINC = 
437
INS_CSETM = 
438
INS_CINV = 
439
INS_CNEG = 
440
INS_SXTB = 
441
INS_SXTH = 
442
INS_SXTW = 
443
INS_CMP = 
444
INS_UXTB = 
445
INS_UXTH = 
446
INS_UXTW = 
447
INS_IC = 
448
INS_DC = 
449
INS_AT = 
450
INS_TLBI = 
451
INS_ENDING = 
452
GRP_INVALID =

Group of ARM64 instructions

0
GRP_JUMP =

Generic groups

1
GRP_CRYPTO =

Architecture-specific groups

128
GRP_FPARMV8 = 
129
GRP_NEON = 
130
GRP_CRC = 
131
GRP_ENDING = 
132
REG_LOOKUP = 
{
  'INVALID' => 0,
  'X29' => 1,
  'X30' => 2,
  'NZCV' => 3,
  'SP' => 4,
  'WSP' => 5,
  'WZR' => 6,
  'XZR' => 7,
  'B0' => 8,
  'B1' => 9,
  'B2' => 10,
  'B3' => 11,
  'B4' => 12,
  'B5' => 13,
  'B6' => 14,
  'B7' => 15,
  'B8' => 16,
  'B9' => 17,
  'B10' => 18,
  'B11' => 19,
  'B12' => 20,
  'B13' => 21,
  'B14' => 22,
  'B15' => 23,
  'B16' => 24,
  'B17' => 25,
  'B18' => 26,
  'B19' => 27,
  'B20' => 28,
  'B21' => 29,
  'B22' => 30,
  'B23' => 31,
  'B24' => 32,
  'B25' => 33,
  'B26' => 34,
  'B27' => 35,
  'B28' => 36,
  'B29' => 37,
  'B30' => 38,
  'B31' => 39,
  'D0' => 40,
  'D1' => 41,
  'D2' => 42,
  'D3' => 43,
  'D4' => 44,
  'D5' => 45,
  'D6' => 46,
  'D7' => 47,
  'D8' => 48,
  'D9' => 49,
  'D10' => 50,
  'D11' => 51,
  'D12' => 52,
  'D13' => 53,
  'D14' => 54,
  'D15' => 55,
  'D16' => 56,
  'D17' => 57,
  'D18' => 58,
  'D19' => 59,
  'D20' => 60,
  'D21' => 61,
  'D22' => 62,
  'D23' => 63,
  'D24' => 64,
  'D25' => 65,
  'D26' => 66,
  'D27' => 67,
  'D28' => 68,
  'D29' => 69,
  'D30' => 70,
  'D31' => 71,
  'H0' => 72,
  'H1' => 73,
  'H2' => 74,
  'H3' => 75,
  'H4' => 76,
  'H5' => 77,
  'H6' => 78,
  'H7' => 79,
  'H8' => 80,
  'H9' => 81,
  'H10' => 82,
  'H11' => 83,
  'H12' => 84,
  'H13' => 85,
  'H14' => 86,
  'H15' => 87,
  'H16' => 88,
  'H17' => 89,
  'H18' => 90,
  'H19' => 91,
  'H20' => 92,
  'H21' => 93,
  'H22' => 94,
  'H23' => 95,
  'H24' => 96,
  'H25' => 97,
  'H26' => 98,
  'H27' => 99,
  'H28' => 100,
  'H29' => 101,
  'H30' => 102,
  'H31' => 103,
  'Q0' => 104,
  'Q1' => 105,
  'Q2' => 106,
  'Q3' => 107,
  'Q4' => 108,
  'Q5' => 109,
  'Q6' => 110,
  'Q7' => 111,
  'Q8' => 112,
  'Q9' => 113,
  'Q10' => 114,
  'Q11' => 115,
  'Q12' => 116,
  'Q13' => 117,
  'Q14' => 118,
  'Q15' => 119,
  'Q16' => 120,
  'Q17' => 121,
  'Q18' => 122,
  'Q19' => 123,
  'Q20' => 124,
  'Q21' => 125,
  'Q22' => 126,
  'Q23' => 127,
  'Q24' => 128,
  'Q25' => 129,
  'Q26' => 130,
  'Q27' => 131,
  'Q28' => 132,
  'Q29' => 133,
  'Q30' => 134,
  'Q31' => 135,
  'S0' => 136,
  'S1' => 137,
  'S2' => 138,
  'S3' => 139,
  'S4' => 140,
  'S5' => 141,
  'S6' => 142,
  'S7' => 143,
  'S8' => 144,
  'S9' => 145,
  'S10' => 146,
  'S11' => 147,
  'S12' => 148,
  'S13' => 149,
  'S14' => 150,
  'S15' => 151,
  'S16' => 152,
  'S17' => 153,
  'S18' => 154,
  'S19' => 155,
  'S20' => 156,
  'S21' => 157,
  'S22' => 158,
  'S23' => 159,
  'S24' => 160,
  'S25' => 161,
  'S26' => 162,
  'S27' => 163,
  'S28' => 164,
  'S29' => 165,
  'S30' => 166,
  'S31' => 167,
  'W0' => 168,
  'W1' => 169,
  'W2' => 170,
  'W3' => 171,
  'W4' => 172,
  'W5' => 173,
  'W6' => 174,
  'W7' => 175,
  'W8' => 176,
  'W9' => 177,
  'W10' => 178,
  'W11' => 179,
  'W12' => 180,
  'W13' => 181,
  'W14' => 182,
  'W15' => 183,
  'W16' => 184,
  'W17' => 185,
  'W18' => 186,
  'W19' => 187,
  'W20' => 188,
  'W21' => 189,
  'W22' => 190,
  'W23' => 191,
  'W24' => 192,
  'W25' => 193,
  'W26' => 194,
  'W27' => 195,
  'W28' => 196,
  'W29' => 197,
  'W30' => 198,
  'X0' => 199,
  'X1' => 200,
  'X2' => 201,
  'X3' => 202,
  'X4' => 203,
  'X5' => 204,
  'X6' => 205,
  'X7' => 206,
  'X8' => 207,
  'X9' => 208,
  'X10' => 209,
  'X11' => 210,
  'X12' => 211,
  'X13' => 212,
  'X14' => 213,
  'X15' => 214,
  'X16' => 215,
  'X17' => 216,
  'X18' => 217,
  'X19' => 218,
  'X20' => 219,
  'X21' => 220,
  'X22' => 221,
  'X23' => 222,
  'X24' => 223,
  'X25' => 224,
  'X26' => 225,
  'X27' => 226,
  'X28' => 227,
  'V0' => 228,
  'V1' => 229,
  'V2' => 230,
  'V3' => 231,
  'V4' => 232,
  'V5' => 233,
  'V6' => 234,
  'V7' => 235,
  'V8' => 236,
  'V9' => 237,
  'V10' => 238,
  'V11' => 239,
  'V12' => 240,
  'V13' => 241,
  'V14' => 242,
  'V15' => 243,
  'V16' => 244,
  'V17' => 245,
  'V18' => 246,
  'V19' => 247,
  'V20' => 248,
  'V21' => 249,
  'V22' => 250,
  'V23' => 251,
  'V24' => 252,
  'V25' => 253,
  'V26' => 254,
  'V27' => 255,
  'V28' => 256,
  'V29' => 257,
  'V30' => 258,
  'V31' => 259
}
ID_LOOKUP = 
REG_LOOKUP.invert
SYM_LOOKUP = 

      
    

  







  
    

      Class Method Summary
      collapse
    


    
  



  

    
Class Method Details


    
      

  

  
    .register(reg)  ⇒ Object 
  

  

  




  

    
      


285
286
287
288
289
290
291
292

    		
    
      
# File 'lib/arch/arm64_registers.rb', line 285

def self.register reg
  return reg if ID_LOOKUP[reg]
  return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
  if reg.respond_to? :upcase
    return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
  end
  REG_LOOKUP['INVALID']
end