Module: HDLRuby::Verilog

Defined in:
lib/HDLRuby/hruby_verilog_name.rb

Overview

Program with inverse conversion last update 2019 01 29

Constant Summary collapse

@@hdr2verilog =

This is sample. n = "abc_ABC_いろは" puts n
name = n.split("")

{ "buf" => "_v0_buf", "table" => "_v1_table", "time" => "_v2_time" }

Instance Method Summary collapse

Instance Method Details

#name_to_verilog(name) ⇒ Object

Since it is possible to use $ and numbers other than the beginning of the character string, it is divided.



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# File 'lib/HDLRuby/hruby_verilog_name.rb', line 14

def name_to_verilog(name)
    # puts "name_to_verilog with name=#{name}"
    name = name.to_s
    vname = @@hdr2verilog[name]
    unless vname then
        # Shall we change the string?
        if name.match?(/^[_a-zA-Z][_a-zA-Z0-9]*$/) then
            # No, just clone
            vname = name.clone
        else
            # Yes, ensure it is a verilog-compatible name.
            vname = "_v#{@@hdr2verilog.size}_#{name.split(/[^a-zA-Z_0-9]/)[-1]}"
        end
        @@hdr2verilog[name] = vname
    end
    # puts "result vname=#{vname}"
    return vname
end