Class: Verilog::Rename

Inherits:
Object
  • Object
show all
Defined in:
lib/verilog/rename.rb

Instance Attribute Summary collapse

Instance Method Summary collapse

Constructor Details

#initialize(old_name, new_name, path_files) ⇒ Rename

Returns a new instance of Rename.



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# File 'lib/verilog/rename.rb', line 11

def initialize(old_name, new_name, path_files) 
  @old_name   = old_name
  @new_name   = new_name
  @path_files = path_files
end

Instance Attribute Details

#new_file ⇒ Object (readonly)

Returns the value of attribute new_file.



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# File 'lib/verilog/rename.rb', line 8

def new_file
  @new_file
end

#new_name ⇒ Object (readonly)

Returns the value of attribute new_name.



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# File 'lib/verilog/rename.rb', line 7

def new_name
  @new_name
end

#old_file ⇒ Object (readonly)

Returns the value of attribute old_file.



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# File 'lib/verilog/rename.rb', line 8

def old_file
  @old_file
end

#old_name ⇒ Object (readonly)

Returns the value of attribute old_name.



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# File 'lib/verilog/rename.rb', line 7

def old_name
  @old_name
end

#path_files ⇒ Object (readonly)

Returns the value of attribute path_files.



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# File 'lib/verilog/rename.rb', line 6

def path_files
  @path_files
end

Instance Method Details

#rename ⇒ Object 



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# File 'lib/verilog/rename.rb', line 17

def rename
  #Analyse file and rename module
  rename_module

  #update_refferences
end

#rename_module ⇒ Object 



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# File 'lib/verilog/rename.rb', line 24

def rename_module

  #find the correct file first
  file_to_rename     = @path_files.find_by_module( @old_name )

  file_to_rename.contents.gsub!(/(^\s*module )#{@old_name}(\s+|;|\()/i, "\\1#{@new_name}\\2")
  
  extension                   = ::File.extname( file_to_rename.filename )
  absolute_original_file_name = file_to_rename.absolute_filename
  original_file_name          = file_to_rename.filename

  #Need to change file name but keep extension
  file_to_rename.filename = @new_name + extension

  #TODO Possibly check that that module name is not already in use
  #TODO check that the file name is not already used

  #Save file, will use new name.
  file_to_rename.save

  ## Delete Old file
  ::File.delete( absolute_original_file_name )

  ## Update other files including it.
  files_including_it = @path_files.includes_file( original_file_name )

  files_including_it.each do |file|
      file.contents.gsub!(/(^\s*`include [\'\"])#{ original_file_name }([\'\"])/, "\\1#{ file_to_rename.filename }\\2")
      #This could trigger many writes
      ## Verilog File needs a modified flag so files can be itereated and modified version can be saved.
      file.save
  end 

  ## Update files instatiating it.
  files_instantiating_it = @path_files.instantiates_module( @old_name )

  files_instantiating_it.each do |file|
      file.contents.gsub!(/(^\s*)#{ @old_name }(\s+)/,"\\1#{ @new_name }\\2")
      file.save
  end 

end