Module: Risc

Defined in:: lib/risc.rb,
lib/risc/Sim.rb,
lib/risc/Event.rb,
lib/risc/Process.rb,
lib/risc/ProcessWithPid.rb

Overview

This file is part of Risc, a lightweight discrete-event simulator for Ruby. Risc is based on SSim, a simple discrete-event simulator used with the Siena project. See <www.cs.colorado.edu/serl/siena>

Author: Dan Cutting <[email protected]> Based on SSim/JSSim by: Antonio Carzaniga <[email protected]> and Matthew J. Rutherford <[email protected]> See the file AUTHORS for full details.

Risc is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

Risc is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with Risc; if not, write to the Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA

$Id$

Defined Under Namespace

Modules: Process Classes: Action, Event, PDescr, ProcessWithPid, Sim

Constant Summary collapse

SVN_VERSION =

"$Id$"

P_TERMINATED = Internal process status (within Sim).

0x01

P_SEQUENTIAL =

0x02

P_QUEUEING =

0x04

INIT_TIME =